We invite prospective authors to submit their original research papers and reviews of emerging technologies, in standard IEEE double-column format, concerning any branch of VLSI Circuits and Systems which covers a wide range of topics including, but not limited to:
Low-Power Integrated Circuits and Devices
- Analog/Digital/Mixed Signal Circuits
- Low-Voltage Low-Power Sensors and Interfaces
- Circuit design for reliability
- Device Modeling and Simulation
- MEMS/NEMS/ MOEMS Devices
- Organic Devices
- Low-Power Low-Voltage Design
Memory and Computing Processor Design
- Memory Design
- STT-RAM, PC-RAM, R-RAM, and Memristors
- Emerging Memory Technologies
- Neuromorphic Computing
- Quantum Computing
VLSI Architectures and System Integration
- VLSI Signal Processing Architectures
- Biomedical and Bio-Inspired Systems
- RF Integrated Systems
- Optoelectronic-Circuits and Systems
- Power Electronics and Systems
- Control aspects of VLSI Systems
- Machine Learning Architectures
- Low-Power IoT Architectures and Systems
- Compressive Sensing
- Wireless Systems
VLSI Testing and Security
- Hardware Security and VLSI Design Optimization
- Hardware Attacks – Detection, Threat Modelling & Defense
- Fault diagnosis and Fault Models
- DFT and BIST for digital designs
- Hardware-Based Security Primitive Design
- Trusted Design Automation, Tools & Information Flow
- IP Design, quality, interoperability and reuse
- Hardware and System Security
FPGA based Design and Embedded Systems
- High-Speed Interconnects in Microelectronic Systems
- Adaptive Computing Using Reconfigurable Components
- Large-Scale Systems and Power Networks
- Hardware-Software Co-design
- Reconfigurable and FPGA Design
System-Level Design
- Systems-on-Chip (SoC)
- Mixed-Mode System-on-Chip
- Lab-on-Chip
- Network-on-Chip
- Multimedia Processors
- Wireless Transceivers
- Heterogeneous and Homogeneous MPSoCs
Emerging Integrated Circuits and Systems
- Artificial Intelligence Accelerators
- Internet of Things
- Cognitive Computing Systems
- Embedded Hardware Security and Cryptography
- Printed & Flexible Electronics
- Low Power Nanoelectronics
- Low Power Edge Computing Systems
- Wearable and Implantable Circuits
- Advanced 3D ICs & 3D Packaging
CAD for VLSI
- Design Automation and CAD tools
- Design flows for MPSoCs
- ML/AI based design-flows and EDA
- Design automation for DFX
- Virtual Prototyping
Soft copies of papers should be submitted in .pdf format as per the IEEE conference paper format, submits not exceeding six A4 size pages and paper should be uploaded through online portal. There will be double blind review of the paper. Therefore do not include authors’ name in submitted paper. A Paper with authors’ names will not be considered for review. The paper must include an abstract of about 250 words and a maximum of five keywords. The acceptance of the paper is based on the following factors: The purpose of the work; the manner and degree to which it advances the art; specific new results that have been obtained and their significance. Authors of the accepted papers will be informed by email. Information about necessary revisions will be communicated to the corresponding author through email. The author(s) will have to incorporate the suggestions and will have to send the revised camera ready copy of the paper in the given time limit. Along with the paper, authors are required to submit an undertaking form stating that, the paper has not been published previously, is not under consideration for publication elsewhere, and if accepted will not be published elsewhere in the same form. It is mandatory for at least one of the authors to register in non-student category for publication of the paper in proceedings. For the author presenting more than one paper, it is mandatory to register and present each paper separately.
